NAND Flash types in embedded: SLC, MLC, TLC, pSLC

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Does it matter what type of Flash is used for a SoM eMMC?

It’s very common for a large (4 or 8GB) eMMC Flash device to be offered as an alternative to a small NAND device, or an SD card, for storage of the (compressed) boot image, or other non-volatile storage requirements.

But although these devices feature wear levelling and bad-block management schemes, the rate of failure, usually expressed as “write endurance” has to be considered, and this can be as low as 1K cycles for the least reliable forms of TLC flash.

First, let’s define the different types of NAND Flash memory cell. In SLC (Single Level Cell) Flash, each cell holds a 1 or a 0. This is the most reliable form. In MLC (Multi Level Cell) Flash, each cell holds 2 bits of data, so there are 4 charge levels per cell – doubling the density at the expense of increasing the sensitivity to any charge variation. The latest TLC (Triple Level Cell) Flash holds 3 bits per cell and is the most dense and least durable form.

Most of the eMMC devices used in embedded devices are of the MLC type, and in most applications – especially where used for boot image storage – this is fine. Some of the modules we offer, such as certain members of the i.MX6 family are billed as “high-reliability industrial” spec. products. This means that amongst other features they use the versions of the NXP processor rated for maximum “on” lifetime – usually well in excess of 50,000 hours. Another way that we seek to fulfil the hi-rel billing is by offering these devices with true industrial temperature (i.e. -40C to +85C) eMMC configured as pSLC (“pseudo-SLC”).

pSLC is MLC flash configured so that instead of having 4 states per cell, we effectively ignore states 1 and 2, so that each cell is only ever programmed into state 3 or 0. In this way, at the expense of halving the capacity, we are able to achieve write endurance of the order of that provided be an SLC device, while using a commercially available MLC part. A side effect of pSLC mode can be improved write speed.

This approach should certainly be a consideration for long-lifetime and critical industrial applications, and in particular for situations where the eMMC may receive regular writes.


By | 2017-05-19T13:11:59+00:00 May 19th, 2016|Application Notes, LInux, System on Module|0 Comments

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